STM

STM

I did a little digging based on Clay Cowgill and Christopher Neil Bradley’s suggestion to look at the STM32H743, and indeed that looks to be a great choice for a processor. It is an ARM7 core with FPU, runs at 400MHz and 856 DMIPS, has both single and double precision floating point (many of the M cores are single precision FPUs only), and has a TON of serial ports. 4 USARTS, 4 UARTS, and 6 SPIs.

I did two different design layouts, looking at the pin mappings to see if I can make them work, and make the physical layout easy. I did one design using UARTs as UARTs (asynchronous). In that configuration I was able to get 8 UARTS on each chip such that each CPU could be connected to the nearest 8 neighbors (side to side and diagonal). Since it is in a UART config, only 2 pins per connection, and it is bi-directional and full duplex. That also allows an additional 4 direct digital connections per node connection ( which could be used for some kind of barrier synchronization, or another transfer protocol. The upside of that architecture is more connectivity, the downside is figuring out has fast I can run those UARTS. Since I am only going a few inches, I suspect I can run them at the maximum 10mbit speed that is supported by the UARTs.

I did a second design where I used 2 SPI channels between each neighbor (only 4 neighbors and 8 SPI channels). The primary reason for that is because with SPI, only one side is driving the clock, so if the other side (the slave) wants to transmit something, it has to wait for the master to send something ( and thus drive the clock). Most people use an additional digital line to signal that (which could drive an interrupt), but that is a huge amount of processor overhead just to send a single byte… and it makes the efficiency not uniform. Using two SPIs interfaces means each one is driven by each side, and as an added bonus there can be two simultaneous transfers in both directions. The SPI ports can be driven at up to 50MHz, which would be a significant boost in potential transfer rates.

These chips are TQFP-100s, with 0.5mm pitch, so not something I would want to hand solder a lot, but in the realm of home reflow for sure.

I am still exploring the FPGA soft core option.. but of course it is almost impossible to find any recent FPGAs that are still QFP packages. Almost all of them are BGAs.

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